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A Memory-Level Parallelism Aware Fetch Policy for SMT Processors
Scottsdale, AZ, USA February 10-February 14
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/HPCA.2007.3462012007 IEEE 13th International Symposiu ...
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Stijn Everman, ELIS Department, Ghent University, Belgium. Email: seyerman@elis.UGent.be
Lieven Eeckhout, ELIS Department, Ghent University, Belgium. Email: leeckhou@elis.UGent.be
A thread executing on a simultaneous multithreading (SMT) processor that experiences a long-latency load will eventually stall while holding execution resources. Existing long-latency load aware SMT fetch policies limit the amount of resources allocated by a stalled thread by identifying long-latency loads and preventing the given thread from fetching more instructions - and in some implementations, instructions beyond the long-latency load may even be flushed which frees allocated resources. This paper proposes an SMT fetch policy that takes into account the available memory-level parallelism (MLP) in a thread. The key idea proposed in this paper is that in case of an isolated long-latency load, i.e., there is no MLP, the thread should be prevented from allocating additional resources. However, in case multiple independent logn-latency loads overlao, i.e., there is MLP, the thread should allocate as many resources as needed in order to fully expose the available MLP. The proposed MLP-aware fetch policy achieves better performance for MLP-intensive threads on a SMT processor and achieves a better overall balance between performance and fairness than previously proposed fetch policies.
Citation:
Stijn Everman, Lieven Eeckhout, "A Memory-Level Parallelism Aware Fetch Policy for SMT Processors," hpca, pp.240-249, 2007 IEEE 13th International Symposium on High Performance Computer Architecture, 2007
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