Memory and Thread Placement Effects as a Function of Cache Usage: A Study of the Gaussian Chemistry Code on the SunFire X4600 M2

May 07-May 09

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http://doi.ieeecomputersociety.org/10.1109/I-SPAN.2008.13

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	ASCII Text	x
	R. Yang, J. Antony, P. P. Janes, A. P. Rendell, "Memory and Thread Placement Effects as a Function of Cache Usage: A Study of the Gaussian Chemistry Code on the SunFire X4600 M2," Parallel Architectures, Algorithms, and Networks, International Symposium on, pp. 31-36, The International Symposium on Parallel Architectures, Algorithms, and Networks (i-span 2008), 2008.

	BibTex	x
	@article{ 10.1109/I-SPAN.2008.13, author = {R. Yang and J. Antony and P. P. Janes and A. P. Rendell}, title = {Memory and Thread Placement Effects as a Function of Cache Usage: A Study of the Gaussian Chemistry Code on the SunFire X4600 M2}, journal ={Parallel Architectures, Algorithms, and Networks, International Symposium on}, volume = {0}, year = {2008}, isbn = {978-0-7695-3125-0}, pages = {31-36}, doi = {http://doi.ieeecomputersociety.org/10.1109/I-SPAN.2008.13}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Parallel Architectures, Algorithms, and Networks, International Symposium on TI - Memory and Thread Placement Effects as a Function of Cache Usage: A Study of the Gaussian Chemistry Code on the SunFire X4600 M2 SN - 978-0-7695-3125-0 SP31 EP36 A1 - R. Yang, A1 - J. Antony, A1 - P. P. Janes, A1 - A. P. Rendell, PY - 2008 KW - null VL - 0 JA - Parallel Architectures, Algorithms, and Networks, International Symposium on ER -

R. Yang

J. Antony

P. P. Janes

A. P. Rendell

In this work we study the effect of cache blocking and memory/thread placement on a modern multicore shared memory parallel system, the SunFire X4600 M2, using the Gaussian 03 computational chemistry code. A protocol for performing memory and thread placement studies is outlined, as is a scheme for characterizing a particular memory and thread placement pattern. Results for parallel Gaussian 03 runs with up to 16 threads are presented.

Citation:

R. Yang, J. Antony, P. P. Janes, A. P. Rendell, "Memory and Thread Placement Effects as a Function of Cache Usage: A Study of the Gaussian Chemistry Code on the SunFire X4600 M2," ispan, pp.31-36, The International Symposium on Parallel Architectures, Algorithms, and Networks (i-span 2008), 2008

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