A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors

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http://doi.ieeecomputersociety.org/10.1109/ICCD.2005.14

2005 International Conference on Comp ...

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	Muhammad Khellah, Maged Ghoneima, James Tschanz, Yibin Ye, Nasser Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea Ismail, "A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors," Computer Design, International Conference on, pp. 253-257, 2005 International Conference on Computer Design, 2005.

	BibTex	x
	@article{ 10.1109/ICCD.2005.14, author = {Muhammad Khellah and Maged Ghoneima and James Tschanz and Yibin Ye and Nasser Kurd and Javed Barkatullah and Srikanth Nimmagadda and Yehea Ismail}, title = {A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors}, journal ={Computer Design, International Conference on}, volume = {0}, year = {2005}, isbn = {0-7695-2451-6}, pages = {253-257}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2005.14}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Computer Design, International Conference on TI - A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors SN - 0-7695-2451-6 SP253 EP257 A1 - Muhammad Khellah, A1 - Maged Ghoneima, A1 - James Tschanz, A1 - Yibin Ye, A1 - Nasser Kurd, A1 - Javed Barkatullah, A1 - Srikanth Nimmagadda, A1 - Yehea Ismail, PY - 2005 KW - null VL - 0 JA - Computer Design, International Conference on ER -

Muhammad Khellah, ECE Dept., Northwestern University, Evanston, IL, USA

Maged Ghoneima, ECE Dept., Northwestern University, Evanston, IL, USA

James Tschanz, ECE Dept., Northwestern University, Evanston, IL, USA

Yibin Ye, ECE Dept., Northwestern University, Evanston, IL, USA

Nasser Kurd, Circuits Research

Javed Barkatullah, Circuits Research

Srikanth Nimmagadda, LTD-Group, Intel, Hillsboro, OR

Yehea Ismail, ECE Dept., Northwestern, University, Evanston, IL,

This paper purposes a bus architecture called Skewed Repeater Bus (SRB) for reducing on-chip interconnect energy in microprocessors. By introducing relative delay between neighboring bus lines, SRB reduces both average and worst-case coupling capacitance between those lines. SRB is compared to previously published techniques like Delayed Data Bus (DDB) and Delayed Clock Bus (DCB). Simulation results in 65-nm process show that bus energy reduction of 18% is achieved when SRB is applied to a real microprocessor example, versus 11% and 7% only for DDB and DCB; respectively.

Citation:

Muhammad Khellah, Maged Ghoneima, James Tschanz, Yibin Ye, Nasser Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea Ismail, "A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors," iccd, pp.253-257, 2005 International Conference on Computer Design, 2005

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