A Feasibility Study of Subthreshold SRAM Across Technology Generations

San Jose, California October 02-October 05

DOI Bookmark:

http://doi.ieeecomputersociety.org/10.1109/ICCD.2005.7

2005 International Conference on Comp ...

	This Article
	PURCHASE ARTICLE: $19 PDF HTML IEEE Xplore Subscribers
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Arijit Raychowdhury Articles by Saibal Mukhopadhyay Articles by Kaushik Roy

	ASCII Text	x
	Arijit Raychowdhury, Saibal Mukhopadhyay, Kaushik Roy, "A Feasibility Study of Subthreshold SRAM Across Technology Generations," Computer Design, International Conference on, pp. 417-424, 2005 International Conference on Computer Design, 2005.

	BibTex	x
	@article{ 10.1109/ICCD.2005.7, author = {Arijit Raychowdhury and Saibal Mukhopadhyay and Kaushik Roy}, title = {A Feasibility Study of Subthreshold SRAM Across Technology Generations}, journal ={Computer Design, International Conference on}, volume = {0}, year = {2005}, isbn = {0-7695-2451-6}, pages = {417-424}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2005.7}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Computer Design, International Conference on TI - A Feasibility Study of Subthreshold SRAM Across Technology Generations SN - 0-7695-2451-6 SP417 EP424 A1 - Arijit Raychowdhury, A1 - Saibal Mukhopadhyay, A1 - Kaushik Roy, PY - 2005 KW - null VL - 0 JA - Computer Design, International Conference on ER -

Arijit Raychowdhury, Dept. of ECE, Purdue University, West Lafayette, IN

Saibal Mukhopadhyay, Dept. of ECE, Purdue University, West Lafayette, IN

Kaushik Roy, Dept. of ECE, Purdue University, West Lafayette, IN

Abstract: In this paper we have explored the feasibility of designing an SRAM array in the subthreshold domain of device operation. We have performed a nominal corner analysis of power and stability and a statistical analysis of the different failure probablilities of the subthreshold SRAM. Our analysis shows that subthreshold SRAM gives significant reduction (~100X) of operating amd standby power at iso-performance (~100MHz) compared to the superthreshold counterpart. However, with increasing intra-die variation owing to technology scaling, the failure probability of subthreshold SRAM increases thereby masking the power benefits.

Citation:

Arijit Raychowdhury, Saibal Mukhopadhyay, Kaushik Roy, "A Feasibility Study of Subthreshold SRAM Across Technology Generations," iccd, pp.417-424, 2005 International Conference on Computer Design, 2005

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.