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MV-FT: Efficient Implementation for Matrix-Vector Multiplication on FT64 Stream Processor
February 10-February 15
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICDS.2008.16Second International Conference on th ...
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In this paper, we present a detailed case study of the optimizing implementation of a fundamental scientific kernel, matrix-vector multiplication, on FT64, which is the first 64-bit stream processor designed for scientific computing. The major novelties of our study are as follows. First, we develop four stream programs according to different stream organizations, involving dot product, row product, multi-dot product and multi-row product approaches. Second the optimal strip size for partitioning the large matrix is put forward based on a practical parameter model. Finally loop unrolling and software pipelining are used to hide the communications with the computations. The experimental results show that the optimizing implementations on FT64 achieve high speedup over the corresponding Fortran programs running on Itanium 2. It is certain that matrix-vector multiplication can efficiently exploit the tremendous potential of FT64 stream processor through programming optimizations.
Citation:
Jing Du, Fujiang Ao, Xuejun Yang, "MV-FT: Efficient Implementation for Matrix-Vector Multiplication on FT64 Stream Processor," icds, pp.134-139, Second International Conference on the Digital Society, 2008
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