It has become clear that the current generation of cryptographic hashing algorithms are insufficient to meet future needs. Hash functions are among the most widespread cryptographic primitives, and are currently used in multiple cryptographic schemes and security protocols such as IPSec and SSL. In this paper, a hardware implementation of the newly proposed draft hash standard SHA-512 achieves high speed performance. The proposed implementation has been integrated by using VHDL and has been synthesized placed and routed in an FPGA device. In addition, it can be integrated in security systems which are used for the implementation networks for wireless protocols, with special needs of integrity in data transmission.