Chip Design of LPC-cepstrum for Speech Recognition

Melbourne, Australia July 11-July 13

DOI Bookmark:

http://doi.ieeecomputersociety.org/10.1109/ICIS.2007.75

6th IEEE/ACIS International Conferenc ...

	This Article
	PURCHASE ARTICLE: $19 PDF HTML IEEE Xplore Subscribers
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Gin-Der Wu Articles by Zhen-Wei Zhu

	ASCII Text	x
	Gin-Der Wu, Zhen-Wei Zhu, "Chip Design of LPC-cepstrum for Speech Recognition," Computer and Information Science, ACIS International Conference on, pp. 43-47, 6th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007), 2007.

	BibTex	x
	@article{ 10.1109/ICIS.2007.75, author = {Gin-Der Wu and Zhen-Wei Zhu}, title = {Chip Design of LPC-cepstrum for Speech Recognition}, journal ={Computer and Information Science, ACIS International Conference on}, volume = {0}, year = {2007}, isbn = {0-7695-2841-4}, pages = {43-47}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICIS.2007.75}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Computer and Information Science, ACIS International Conference on TI - Chip Design of LPC-cepstrum for Speech Recognition SN - 0-7695-2841-4 SP43 EP47 A1 - Gin-Der Wu, A1 - Zhen-Wei Zhu, PY - 2007 KW - null VL - 0 JA - Computer and Information Science, ACIS International Conference on ER -

Gin-Der Wu, National Chi Nan University, Taiwan

Zhen-Wei Zhu, National Chi Nan University, Taiwan

This paper proposed an ASIC of LPC-cepstrum (LPCC) for speech recognition. The proposed ASIC of LPCC can reduce the calculation load of processor in the speech recognition system. In addition, the resource sharing method is adopted into our design in order to reduce the chip size. Hence, it does not give an emphasis on sophistication but on highperformance and low-cost solution. Finally, we did some experiments to compare with other DSP or ASIC design. We found that our proposed LPCC ASIC can efficiently reduce the computation load.

Citation:

Gin-Der Wu, Zhen-Wei Zhu, "Chip Design of LPC-cepstrum for Speech Recognition," icis, pp.43-47, 6th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007), 2007

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.