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Single Event Upset Detection and Correction
Rourkela, India December 17-December 20
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICIT.2007.6010th International Conference on Info ...
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This paper proposes a low cost solution to detect and correct a transient faults in registers of a design. The proposed method realizes a single- event upset detection and correction (SEU-DC) technique. The detection and correction of SEU in registers of a design is difficult and requires some efficient approaches without significant area overhead and timing penalty. Furthermore, the proposed method is based on the traditional parity codes to detect and correct a single-bit error without significant increase in area overhead. We conducted experiments on the MCNC benchmark circuits which show that present approach has very low area overhead and timing penalty as compared to hardware redundancy approach.
Citation:
Jawar Singh, J. Mathew, M. Hosseinabady, D. K. Pradhan, "Single Event Upset Detection and Correction," icit, pp.13-18, 10th International Conference on Information Technology (ICIT 2007), 2007
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