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Real-time Scheduling in Heterogeneous Dual-core Architectures
Minneapolis, Minnesota July 12-July 15
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICPADS.2006.9012th International Conference on Para ...
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Kwangsik Kim, POSTECH, Korea
Dohun Kim, POSTECH, Korea
Chanik Park, POSTECH, Korea
With high computational application, embedded systems are becoming more complex. To achieve high performance in the midst of increased complexity, dual-core SoC (System-on-Chip) is used. Of many Dual-core architectures, a general purpose CPU and DSP are most widely used. But only a few scheduling policies for this heterogeneous architectures exist to guarantee real-time character. This paper discusses scheduling policy for heterogeneous dual-core architectures. We explore the problem of previous scheduling policy [9] based on DPCP (Distributed Priority Ceiling Protocol) [4, 5, 6] and provide a solution of strict schedulability bound model.
Citation:
Kwangsik Kim, Dohun Kim, Chanik Park, "Real-time Scheduling in Heterogeneous Dual-core Architectures," icpads, vol. 2, pp.91-96, 12th International Conference on Parallel and Distributed Systems - Volume 2 (ICPADS'06), 2006
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