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AATMA: an algorithm for technology mapping for antifuse-based FPGAs
New Delhi, India January 04-January 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1995.5120808th International Conference on VLSI ...
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M. Mehendale, Texas Instrum. (India) Pvt. Ltd., Bangalore, India
M.K. Ram Prasad, Texas Instrum. (India) Pvt. Ltd., Bangalore, India
The paper presents AATMA: a technology mapping algorithm for antifuse based FPGAs. The algorithm is independent of the logic module structure. It can handle large libraries with complex functions and uses a signature-matching based approach to achieve high mapping quality and shorter execution times. This makes it a powerful tool not only for mapping designs onto a logic module but also for the design and evaluation of antifuse-based FPGA logic module architectures. The details of the overall algorithm along with the signature matching technique are presented. The experimental results show that AATMA needs upto 15-20% fewer logic modules than MISII and is upto 15 to 20 times faster.
Index Terms:
field programmable gate arrays; logic CAD; directed graphs; combinational circuits; AATMA; technology mapping; antifuse-based FPGAs; logic module structure; complex functions; signature-matching based approach; mapping quality; execution times; logic module architectures
Citation:
M. Mehendale, M.K. Ram Prasad, "AATMA: an algorithm for technology mapping for antifuse-based FPGAs," vlsid, pp.69, 8th International Conference on VLSI Design, 1995
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