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The Pentium processor-90/100, microarchitecture and low power circuit design
New Delhi, India January 04-January 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1995.5121038th International Conference on VLSI ...
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G. Debnath, K. Debnath, R. Fernando, "The Pentium processor-90/100, microarchitecture and low power circuit design," VLSI Design, International Conference on, pp. 185, 8th International Conference on VLSI Design, 1995.
 
 
BibTex
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@article{ 10.1109/ICVD.1995.512103,
author = {G. Debnath and K. Debnath and R. Fernando},
title = {The Pentium processor-90/100, microarchitecture and low power circuit design},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {1995},
isbn = {0-8186-6905-5},
pages = {185},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1995.512103},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - The Pentium processor-90/100, microarchitecture and low power circuit design
SN - 0-8186-6905-5
SP
EP
A1 - G. Debnath,
A1 - K. Debnath,
A1 - R. Fernando,
PY - 1995
KW - microprocessor chips; BIMOS integrated circuits; integrated circuit design; computer architecture; Pentium processor-90/100; microarchitecture; low power circuit design; BiNMOS process; power consumption reduction; symmetric dual processing feature; multithreaded operating systems; 0.6 micron; 3.3 V; 100 MHz
VL - 0
JA - VLSI Design, International Conference on
ER -
 
G. Debnath, Intel Corp., USA
K. Debnath, Intel Corp., USA
R. Fernando, Intel Corp., USA
This paper describes the implementation of the Pentium processor (73590,815100), referred to as the Pentium processor-90/100 from now on, on a 3.3V, 0.6 micron BiNMOS process. The processor achieves significantly higher performance over the previous generation Pentium processor, with reduced power consumption, and a smaller die area (12.76 mm each side). A symmetric dual processing feature is also supported that provides even greater performance advantages for multithreaded operating systems such as Windows NT. Aggressive frequency targets (100 MHz) were achieved through innovative circuit design techniques. This paper also briefly discusses some of the key technology improvements that enabled such aggressive performance goals to be met.
Index Terms:
microprocessor chips; BIMOS integrated circuits; integrated circuit design; computer architecture; Pentium processor-90/100; microarchitecture; low power circuit design; BiNMOS process; power consumption reduction; symmetric dual processing feature; multithreaded operating systems; 0.6 micron; 3.3 V; 100 MHz
Citation:
G. Debnath, K. Debnath, R. Fernando, "The Pentium processor-90/100, microarchitecture and low power circuit design," vlsid, pp.185, 8th International Conference on VLSI Design, 1995
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