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A 20MHz CMOS Variable Gain Amplifier
Bangalore, INDIA January 03-January 06
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1996.4894639th International Conference on VLSI ...
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C. Srinivasan, K. R. Rao, "A 20MHz CMOS Variable Gain Amplifier," VLSI Design, International Conference on, pp. 90, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996.
 
 
BibTex
x
 
@article{ 10.1109/ICVD.1996.489463,
author = {C. Srinivasan and K. R. Rao},
title = {A 20MHz CMOS Variable Gain Amplifier},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {1996},
issn = {1063-9667},
pages = {90},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1996.489463},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - A 20MHz CMOS Variable Gain Amplifier
SN - 1063-9667
SP
EP
A1 - C. Srinivasan,
A1 - K. R. Rao,
PY - 1996
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Abstract A variable gain amplifier with a gain range of 15dB to ,4OdB and 80MHz bandwidth is describe bed here. The circuit is built in a standard CMOS process. A MOS device, operated in the linear region, is used as a shunt feedback element to vary the gain. The circuit embodies an inverse relationship between the gain and the control voltage. The circuit dissipates about 3OmW of power. This circuit has been intended to be used in a PRML read channel chip but can be adapted for other purposes also.
Citation:
C. Srinivasan, K. R. Rao, "A 20MHz CMOS Variable Gain Amplifier," vlsid, pp.90, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996
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