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An Enhanced Macromodel for a CMOS Operational Amplifier for HDL Implementation
Bangalore, INDIA January 03-January 06
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1996.4896269th International Conference on VLSI ...
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Sudhir Aggarwal, "An Enhanced Macromodel for a CMOS Operational Amplifier for HDL Implementation," VLSI Design, International Conference on, pp. 331, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996.
 
 
BibTex
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@article{ 10.1109/ICVD.1996.489626,
author = {Sudhir Aggarwal},
title = {An Enhanced Macromodel for a CMOS Operational Amplifier for HDL Implementation},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {1996},
issn = {1063-9667},
pages = {331},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1996.489626},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - An Enhanced Macromodel for a CMOS Operational Amplifier for HDL Implementation
SN - 1063-9667
SP
EP
A1 - Sudhir Aggarwal,
PY - 1996
KW - Macromodel
KW - Operational Amplifier
KW - VHDL-Analog
KW - Non-linear model
KW - Analog IC's
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Sudhir Aggarwal, SGS-THOMSON Microelectronics Sector 16A, NOIDA-201301, INDIA
In this paper, an enhanced macromodel for an operational amplifier is presented which takes into account the second order effects such as the gain-nonlinearity, the noise, the d.c. power-supply rejection and the slew-rate limitations. Implementation of the macromodel in one of the commercial HDLAs, and its comparison with a device level simulations illustrate the accuracy of the macromodel
Index Terms:
Macromodel, Operational Amplifier, VHDL-Analog, Non-linear model, Analog IC's
Citation:
Sudhir Aggarwal, "An Enhanced Macromodel for a CMOS Operational Amplifier for HDL Implementation," vlsid, pp.331, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996
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