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Rapid Synthesis of Multi-Chip Systems
Hyderabad, India January 04-January 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.567962Tenth International Conference on VLS ...
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Dong-Hyun Heo, University of Southern California
Alice Parker, University of Southern California
C.P. Ravikumar, Indian Institute of Technology
There is increasing demand for multi-chip implementations of a complex digital system from the consumer market. Although making correct system-level design decisions in the early design stages is a non-trivial task and has farreaching impact on the final quality of the system, this process has not been filly automated. Among many considerations in designing a multi-chip system, reducing the time-to-market is the one of the most critical. In this paper, we present EDEAr, a software package which is based on a mixed integer-linear programming formulation of the multichip system synthesis problem. Our objective is to synthesize system architectures that have minimum prototyping time and satisfy the user-speci$ed cost and timing constraints. We belive EDEN can speed up the system-level design process by helping the designer make early system-level design decisions through its capability to search the vast design space and to visualize feasible system architectures. Experimental results of EDEN on the synthesis of an MPEG description are presented.
Citation:
Dong-Hyun Heo, Alice Parker, C.P. Ravikumar, "Rapid Synthesis of Multi-Chip Systems," vlsid, pp.62, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997
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