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Low-Power Configurable Processor Array for DLMS Adaptive Filtering
Hyderabad, India January 04-January 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568076Tenth International Conference on VLS ...
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S. Ramanathan, V. Visvanathan, "Low-Power Configurable Processor Array for DLMS Adaptive Filtering," VLSI Design, International Conference on, pp. 198, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997.
 
 
BibTex
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@article{ 10.1109/ICVD.1997.568076,
author = {S. Ramanathan and V. Visvanathan},
title = {Low-Power Configurable Processor Array for DLMS Adaptive Filtering},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {1997},
issn = {1063-9667},
pages = {198},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568076},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - VLSI Design, International Conference on
TI - Low-Power Configurable Processor Array for DLMS Adaptive Filtering
SN - 1063-9667
SP
EP
A1 - S. Ramanathan,
A1 - V. Visvanathan,
PY - 1997
VL - 0
JA - VLSI Design, International Conference on
ER -
 
S. Ramanathan, Indian Institute of Science
V. Visvanathan, Indian Institute of Science
In this paper, we first present a pipelined delayed least mean square (DLMS) adaptive filter architecture whose power dissipation meets a specified budget. This low-power architecture exploits the parallelism in the DLMS algorithm to meet the required computational throughput. The architecture exhibits a novel tradeoff between algorithmic performance and power dissipation. This architecture is then extended to derive a configurable processor array (CPA), which is configurable for filter order, sample period and power reduction factor. The hardware overhead incurred for configurability is minimal.
Citation:
S. Ramanathan, V. Visvanathan, "Low-Power Configurable Processor Array for DLMS Adaptive Filtering," vlsid, pp.198, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997
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