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Inductive Verification of Sequential Circuits with a Datapath
Hyderabad, India January 04-January 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568080Tenth International Conference on VLS ...
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I. Chakrabarti, Indian Institute of Technology
D. Sarkar, Indian Institute of Technology
A. K. Majumdar, Indian Institute of Technology
A backward reasoning approach to verify a digital circuit is described. The proposed proof procedure is an augmentation of inductive reasoning over the states of a finite state machine. The augmentation addresses the issues related to reasoning with both the data and control paths of the circuit. The methodology has been illustrated with a lift controller example. Limitation of this proof approach is also identified.
Index Terms:
finite state machine, theorem proving, hardware verification, backward reasoning, inductive reasoning, data and control paths, data invariant.
Citation:
I. Chakrabarti, D. Sarkar, A. K. Majumdar, "Inductive Verification of Sequential Circuits with a Datapath," vlsid, pp.226, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997
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