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Adder and Comparator Synthesis with Exclusive-OR Transform of Inputs
Hyderabad, India January 04-January 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568190Tenth International Conference on VLS ...
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J. Jacob, P.S. Sivakumar, V.D. Agrawal, "Adder and Comparator Synthesis with Exclusive-OR Transform of Inputs," VLSI Design, International Conference on, pp. 514, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997.
 
 
BibTex
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@article{ 10.1109/ICVD.1997.568190,
author = {J. Jacob and P.S. Sivakumar and V.D. Agrawal},
title = {Adder and Comparator Synthesis with Exclusive-OR Transform of Inputs},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {1997},
issn = {1063-9667},
pages = {514},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568190},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - Adder and Comparator Synthesis with Exclusive-OR Transform of Inputs
SN - 1063-9667
SP
EP
A1 - J. Jacob,
A1 - P.S. Sivakumar,
A1 - V.D. Agrawal,
PY - 1997
KW - adders
KW - adder
KW - comparator
KW - input variables
KW - PLA
KW - circuit synthesis
KW - truth table
KW - transform logic
KW - exclusive-OR gate
VL - 0
JA - VLSI Design, International Conference on
ER -
 
J. Jacob, Indian Inst. of Sci., Bangalore, India
P.S. Sivakumar, Indian Inst. of Sci., Bangalore, India
V.D. Agrawal, Indian Inst. of Sci., Bangalore, India
An exclusive-OR transform of input variables significantly reduces the size of the PLA implementation for adder and comparator circuits. For n bit adder circuits, the size of PLA for transformed functions is O(n/sup 2/). In comparison, when the complete truth-table of an adder is minimized, the PLA size will be O(2/sup n+2/). Similarly, for an n bit comparator, the size of the PLA is reduced from O(2/sup n+1/) to O(n). These implementations require additional transform logic of complexity O(n), consisting of exclusive-OR gates.
Index Terms:
adders, adder, comparator, input variables, PLA, circuit synthesis, truth table, transform logic, exclusive-OR gate
Citation:
J. Jacob, P.S. Sivakumar, V.D. Agrawal, "Adder and Comparator Synthesis with Exclusive-OR Transform of Inputs," vlsid, pp.514, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997
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