A New Methodology for Concurrent Technology Development and Cell Library Optimization

Goa, India January 10-January 13

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http://doi.ieeecomputersociety.org/10.1109/ICVD.1999.745118

12th International Conference on VLSI ...

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	Similar Articles Articles by Marko Chew Articles by Sharad Saxena Articles by Thomas F. Cobourn Articles by P.K. Mozumder Articles by Andrzej J. Strojwas

	ASCII Text	x
	Marko Chew, Sharad Saxena, Thomas F. Cobourn, P.K. Mozumder, Andrzej J. Strojwas, "A New Methodology for Concurrent Technology Development and Cell Library Optimization," VLSI Design, International Conference on, pp. 18, 12th International Conference on VLSI Design - 'VLSI for the Information Appliance', 1999.

	BibTex	x
	@article{ 10.1109/ICVD.1999.745118, author = {Marko Chew and Sharad Saxena and Thomas F. Cobourn and P.K. Mozumder and Andrzej J. Strojwas}, title = {A New Methodology for Concurrent Technology Development and Cell Library Optimization}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {1999}, issn = {1063-9667}, pages = {18}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1999.745118}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - A New Methodology for Concurrent Technology Development and Cell Library Optimization SN - 1063-9667 SP EP A1 - Marko Chew, A1 - Sharad Saxena, A1 - Thomas F. Cobourn, A1 - P.K. Mozumder, A1 - Andrzej J. Strojwas, PY - 1999 VL - 0 JA - VLSI Design, International Conference on ER -

To minimize the time to market and cost of new sub 0.25um process technologies and products, PDF Solutions, Inc., has developed a new comprehensive approach based on the use of predictive simulation tools combined with highly efficient experimental design techniques and special test structures. This paper focuses on our approach for concurrent development of new technologies and optimization of cell libraries for these technologies. We present a software system called Circuit Surfer which performs this library optimization in a highly automated fashion and with guaranteed correctness in silicon. We demonstrate several examples of Circuit Surfer applications to cell library design to optimize such objective functions as performance, cell area or yield.

Citation:

Marko Chew, Sharad Saxena, Thomas F. Cobourn, P.K. Mozumder, Andrzej J. Strojwas, "A New Methodology for Concurrent Technology Development and Cell Library Optimization," vlsid, pp.18, 12th International Conference on VLSI Design - 'VLSI for the Information Appliance', 1999

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