In this paper, we present algorithmic and architectural transforms for low power realization of Residue Number System(RNS) based FIR filters. These transforms have been systematically derived so as to achieve power reduction by voltage scaling, switched capacitance reduction and reduction in signal activity. We show how some of the existing techniques can be suitably adopted to RNS based implementations and also propose new techniques that exploit the specific properties of RNS based computation. We present results to show the effectiveness of our techniques. The results for modulo-5 and modulo-7 indicate that using just two of these techniques(coefficient encoding and coefficient ordering), power reduction of up-to 33% can be achieved.