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On-line Fault Detection and Location for NoC Interconnects
Lake of Como, Italy July 10-July 12
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IOLTS.2006.4412th IEEE International On-Line Testi ...
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Cristian Grecu, University of British Columbia, Canada
Andr? Ivanov, University of British Columbia, Canada
Res Saleh, University of British Columbia, Canada
Egor S. Sogomonyan, University of Potsdam, Germany
Partha Pratim Pande, Washington State University, USA
A novel method for on-line fault detection and location in Network-on-chip (NoC) communication fabrics is introduced. This approach is able to distinguish between faults in the communication links and faults in the NoC switches. The idea is based on the use of code-disjoint routing elements, combined with parity check encoding for the inter-switch links. We analyze the effect of our method on relevant performance parameters - power, latency, and throughput. Experiments show that our approach is effective and requires minimal modifications of the existing design methods for NoC interconnects.
Citation:
Cristian Grecu, Andr? Ivanov, Res Saleh, Egor S. Sogomonyan, Partha Pratim Pande, "On-line Fault Detection and Location for NoC Interconnects," iolts, pp.145-150, 12th IEEE International On-Line Testing Symposium (IOLTS'06), 2006
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