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A Partitioning Technique for Identification of Error-Capturing Scan Cells in Scan-BIST
Lake of Como, Italy July 10-July 12
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IOLTS.2006.912th IEEE International On-Line Testi ...
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Chaowen Yu, University of Iowa, USA
Sudhakar M. Reddy, University of Iowa, USA
Irith Pomeranz, Purdue University, USA
The paper proposes a two-step scan cell partitioning scheme to identify the error-capturing scan cells in a scan-BIST environment. In the first step, a deterministic partitioning scheme is used, whose target is to maximize the correlations between different scan cells in fault diagnosis since different scan cells have very different probabilities of capturing fault effects. In the second step, a previously proposed random partitioning scheme is used to generate additional partitions. Experimental results are reported on the five largest ISCAS?89 benchmark circuits and compared with that for the random partitioning scheme and another earlier work using interval-based partitioning scheme.
Citation:
Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz, "A Partitioning Technique for Identification of Error-Capturing Scan Cells in Scan-BIST," iolts, pp.37-42, 12th IEEE International On-Line Testing Symposium (IOLTS'06), 2006
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