loading...
Improvement of Power-Performance Efficiency for High-End Computing
Denver, Colorado April 04-April 08
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IPDPS.2005.25119th IEEE International Parallel and ...
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Rong Ge, University of South Carolina, Columbia
Xizhou Feng, University of South Carolina, Columbia
Kirk W. Cameron, University of South Carolina, Columbia
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. Recent work has shown application characteristics of single-processor, memorybound non-interactive codes and distributed, interactive web services can be exploited to conserve power and energy with minimal performance impact. Our novel approach is to exploit parallel performance inefficiencies characteristic of non-interactive, distributed scientific applications, conserving energy using DVS (dynamic voltage scaling) without impacting time-to-solution (TTS) significantly, reducing cost and improving reliability. We present a software framework to analyze and optimize distributed power-performance using DVS implemented on a 16-node Centrino-based cluster. Using various DVS strategies we achieve application-dependent overall system energy savings as large as 25% with as little as 2% performance impact.
Citation:
Rong Ge, Xizhou Feng, Kirk W. Cameron, "Improvement of Power-Performance Efficiency for High-End Computing," ipdps, vol. 12, pp.233b, 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 11, 2005
Usage of this product signifies your acceptance of the Terms of Use.