In a PC system, external storage interface is still a bottleneck in spite of its continuous improving performance. This makes I/O interface a bottleneck of high performance systems, especially graphics and disk storage. Increase the bandwidth of an I/O bus may be achieved by either increase bus width (e.g.16b to 32b) or by increasing operating frequency. Parallel interface is difficult to be implemented because of its nature drawback, e.g., Technologies such as embedded clock, point-to-point linkage, low voltage differential signal transmission and data encoding, enables gigabit serial bus get reliable high transfer rate at practical long distance, and become the next generation of interconnection interfaces. This paper will discuss the differences between Parallel ATA protocol and serial ATA protocol, and describe the hierarchical classification of serial ATA protocol model. Last a design for a parallel/serial ATA bridge connection chip will be put forward and the test performance index for this chip is also provided.