Design of a 10-bit TSMC 0.25um CMOS Digital to Analog Converter

San Jose, California March 21-March 23

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http://doi.ieeecomputersociety.org/10.1109/ISQED.2005.42

Sixth International Symposium on Qual ...

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	J. Huynh, B. Ngo, M. Pham, L. He, "Design of a 10-bit TSMC 0.25um CMOS Digital to Analog Converter," Quality Electronic Design, International Symposium on, pp. 187-192, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005.

	BibTex	x
	@article{ 10.1109/ISQED.2005.42, author = {J. Huynh and B. Ngo and M. Pham and L. He}, title = {Design of a 10-bit TSMC 0.25um CMOS Digital to Analog Converter}, journal ={Quality Electronic Design, International Symposium on}, volume = {0}, year = {2005}, isbn = {0-7695-2301-3}, pages = {187-192}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2005.42}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Quality Electronic Design, International Symposium on TI - Design of a 10-bit TSMC 0.25um CMOS Digital to Analog Converter SN - 0-7695-2301-3 SP187 EP192 A1 - J. Huynh, A1 - B. Ngo, A1 - M. Pham, A1 - L. He, PY - 2005 KW - null VL - 0 JA - Quality Electronic Design, International Symposium on ER -

J. Huynh, San Jose State University, CA

B. Ngo, San Jose State University, CA

M. Pham, San Jose State University, CA

L. He, San Jose State University, CA

The goal of this project is to implement a 10-bit segmented current steering TSMC 0.25 ?m CMOS digital to analog converter. Binary coded 10-bit data was input to the converter. The converter will convert all combinations of ten bits from digital form into correspondent "staircase" voltage levels. A low pass filter placed after the output terminal of the converter is necessary to make the voltage level smooth.

Citation:

J. Huynh, B. Ngo, M. Pham, L. He, "Design of a 10-bit TSMC 0.25um CMOS Digital to Analog Converter," isqed, pp.187-192, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005

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