Noise Library Characterization for Large Capacity Static Noise Analysis Tools
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| San Jose, California March 21-March 23 |
Sam Lo, Synopsys, Inc., Mountain View, CA
Noise glitches can cause timing degradation in switching nodes or incorrect transitions in steady-state or "quiet" nodes. These incorrect transitions can propagate through the circuit, and can create functional errors or failures. This paper presents both a method and a practical implementation technique for accurately and efficiently characterizing and modeling the propagation of noise glitches through a cell within an integrated circuit. A characterization methodology is developed to generate Noise Immunity Criteria (NIC) and Noise Propagation Tables (NPT) for a given cell library. The resulting look-up tables are appended to any standard gate-level library to be utilized by Static Timing and Noise Analysis (STNA) tools.
Citation:
Alex Gyure, Alireza Kasnavi, Sam Lo, Peivand F. Tehrani, William Shu, Mahmoud Shahram, Joddy W. Wang, Jindrich Zedja, "Noise Library Characterization for Large Capacity Static Noise Analysis Tools," isqed, pp.28-34, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005
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