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Passive Hierarchical Model Order Reduction and Realization of RLCM Circuits
San Jose, California March 21-March 23
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISQED.2005.92Sixth International Symposium on Qual ...
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Pu Liu, University of California, Riverside, CA
Zhenyu Qi, University of California, Riverside, CA
Sheldon X.-D. Tan, University of California, Riverside, CA
This paper presents a novel compact passive modeling technique for high-performance RF passives and interconnects modeled as high-order RLCM circuits. The new method is based on a recently proposed general s-domain hierarchical modeling and analysis method. In this work, we first apply state-space based optimization technique to enforce passivity on the hierarchical model order reduced admittance matrix. To realize the passivity-enforced admittance, we propose a general multi-port network realization method based on relaxed one-port network synthesis technique based on Foster's canonical form. The resulting modeling algorithm leads to general SPICE-in and SPICE-out multi-port passive realization of any linear passive networks with easily controlled model accuracy and complexity. The experimental results on a number of PEEC modeled bus lines circuits demonstrate the effectiveness of the proposed algorithm.
Citation:
Pu Liu, Zhenyu Qi, Sheldon X.-D. Tan, "Passive Hierarchical Model Order Reduction and Realization of RLCM Circuits," isqed, pp.603-608, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005
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