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Power Gating with Multiple Sleep Modes
San Jose, California March 27-March 29
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISQED.2006.1027th International Symposium on Qualit ...
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Kanak Agarwal, IBM Research, Austin, TX
Kevin Nowka, IBM Research, Austin, TX
Harmander Deogun, University of Michigan, Ann Arbor, MI
Dennis Sylvester, University of Michigan, Ann Arbor, MI
This paper describes a power gating technique with multiple sleep modes where each mode represents a trade-off between wake-up overhead and leakage savings. We show that high wake-up latency and wake-up power penalty of traditional power gating limits its application to large stretches of inactivity. Our simulations and data traces show that multiple sleep mode capability provides an extra 17% reduction in overall leakage as compared to single mode gating. The multiple modes can be designed to allow state-retentive modes. The results on benchmarks show that a single state-retentive mode can reduce leakage by 19% while preserving state of the circuit.
Citation:
Kanak Agarwal, Kevin Nowka, Harmander Deogun, Dennis Sylvester, "Power Gating with Multiple Sleep Modes," isqed, pp.633-637, 7th International Symposium on Quality Electronic Design (ISQED'06), 2006
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