The use of linear dependency relationships among path delay faults (PDFs) is an effective way to determine circuit timing characteristics. The proposed approach improves the performance of performing a linear dependency check by accelerating the Gauss elimination process. This paper presents new algorithms to represent a PDF with respect to a testable set as well as a methodology to calculate the delays of all critical sensitizable PDFs while testing only a small subset of testable PDFs. In contrast to a previous implicit method, the proposed method guarantees that each sensitizable fault can be represented as a linear combination of tested faults but its time performance can be significantly improved when combined with such implicit methods.