Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation

March 17-March 19

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http://doi.ieeecomputersociety.org/10.1109/ISQED.2008.132

9th International Symposium on Qualit ...

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	ASCII Text	x
	Joseph F. Ryan, Benton H. Calhoun, "Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation," Quality Electronic Design, International Symposium on, pp. 127-132, 9th International Symposium on Quality Electronic Design (isqed 2008), 2008.

	BibTex	x
	@article{ 10.1109/ISQED.2008.132, author = {Joseph F. Ryan and Benton H. Calhoun}, title = {Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation}, journal ={Quality Electronic Design, International Symposium on}, volume = {0}, year = {2008}, isbn = {978-0-7695-3117-5}, pages = {127-132}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2008.132}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Quality Electronic Design, International Symposium on TI - Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation SN - 978-0-7695-3117-5 SP127 EP132 A1 - Joseph F. Ryan, A1 - Benton H. Calhoun, PY - 2008 KW - Sub-threshold Circuits KW - Sub-Vt KW - Sense-Amplifiers KW - Offset KW - Variation VL - 0 JA - Quality Electronic Design, International Symposium on ER -

Joseph F. Ryan

Benton H. Calhoun

This paper examines latch style voltage mode sense amplifiers for operation in the sub-threshold region, where VDD

Index Terms:

Sub-threshold Circuits, Sub-Vt, Sense-Amplifiers, Offset, Variation

Citation:

Joseph F. Ryan, Benton H. Calhoun, "Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation," isqed, pp.127-132, 9th International Symposium on Quality Electronic Design (isqed 2008), 2008

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