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Quality of a Bit (QoB): A New Concept in Dependable SRAM
March 17-March 19
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISQED.2008.729th International Symposium on Qualit ...
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Hidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi, Hiroki Noguchi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yosimoto, "Quality of a Bit (QoB): A New Concept in Dependable SRAM," Quality Electronic Design, International Symposium on, pp. 98-102, 9th International Symposium on Quality Electronic Design (isqed 2008), 2008.
 
 
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@article{ 10.1109/ISQED.2008.72,
author = {Hidehiro Fujiwara and Shunsuke Okumura and Yusuke Iguchi and Hiroki Noguchi and Yasuhiro Morita and Hiroshi Kawaguchi and Masahiko Yosimoto},
title = {Quality of a Bit (QoB): A New Concept in Dependable SRAM},
journal ={Quality Electronic Design, International Symposium on},
volume = {0},
year = {2008},
isbn = {978-0-7695-3117-5},
pages = {98-102},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2008.72},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Quality Electronic Design, International Symposium on
TI - Quality of a Bit (QoB): A New Concept in Dependable SRAM
SN - 978-0-7695-3117-5
SP98
EP102
A1 - Hidehiro Fujiwara,
A1 - Shunsuke Okumura,
A1 - Yusuke Iguchi,
A1 - Hiroki Noguchi,
A1 - Yasuhiro Morita,
A1 - Hiroshi Kawaguchi,
A1 - Masahiko Yosimoto,
PY - 2008
KW - SRAM
KW - Quality of a bit
VL - 0
JA - Quality Electronic Design, International Symposium on
ER -
 
We propose a novel dependable SRAM with 7T memory cells, and introduce a new concept, “quality of a bit (QoB)” for it. The proposed SRAM has three modes: a typical mode, high-speed mode, and dependable mode, in which the QoB is scalable. That is, the area, speed, reliability, and/or power of one-bit information can be controlled. In the typical mode, assignment of information is as usual as one memory cell has one bit. On the other hand, in the high-speed or dependable mode, one-bit information is stored in two memory cells, which boosts the speed or increases the reliability. By carrying out Monte Carlo simulation of dynamic cell stability in a 90-nm process technology, we confirmed the advantage of the proposed SRAM.
Index Terms:
SRAM, Quality of a bit
Citation:
Hidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi, Hiroki Noguchi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yosimoto, "Quality of a Bit (QoB): A New Concept in Dependable SRAM," isqed, pp.98-102, 9th International Symposium on Quality Electronic Design (isqed 2008), 2008
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