loading...
Exploiting Inter-Processor Data Sharing for Improving Behavior of Multi-Processor SoCs
Tampa, Florida May 11-May 12
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2005.32IEEE Computer Society Annual Symposiu ...
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Guilin Chen, Pennsylvania State University
Guangyu Chen, Pennsylvania State University
Ozcan Ozturk, Pennsylvania State University
Mahmut Kandemir, Pennsylvania State University
Software-managed memories are important in real-time embedded environments where execution time predictability is an important requirement. With the proliferation of embedded multi-processor systems, software support for their memories is becoming an attractive research area in real-time embedded computing. One of the critical problems in embedded real-time multi-processor SoCs (System-on-a-Chip) is to reduce the number of off-chip references. This is because frequent off-chip references can be very costly from both performance and power perspectives. In this paper, we propose a novel compiler-driven strategy for reducing the number of off-chip references, which is based on co-operation between the processors in the multi-processor architecture. Specifically, in the proposed strategy, the processors cache data in their local memories, under compiler control, on behalf of each other if doing so reduces the number of off-chip references.
Citation:
Guilin Chen, Guangyu Chen, Ozcan Ozturk, Mahmut Kandemir, "Exploiting Inter-Processor Data Sharing for Improving Behavior of Multi-Processor SoCs," isvlsi, pp.90-95, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005
Usage of this product signifies your acceptance of the Terms of Use.