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A Robust Synchronizer
Karlsruhe, Germany March 02-March 03
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2006.12IEEE Computer Society Annual Symposiu ...
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Jun Zhou, Newcastle University, UK
David Kinniment, Newcastle University, UK
Gordon Russell, Newcastle University, UK
Alex Yakovlev, Newcastle University, UK
We describe a new latch circuit designed to give a high performance in low voltage synchronizer applications. By increasing the latch current only during metastability, we can more than maintain the value of the metastability time constant, t, without significantly increasing the power. Our circuit also reduces the variation of t with Vdd and temperature, so that it has a lower t at 50% Vdd than the conventional jamb latch has at 60% Vdd.
Citation:
Jun Zhou, David Kinniment, Gordon Russell, Alex Yakovlev, "A Robust Synchronizer," isvlsi, pp.442-443, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06), 2006
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