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Overview of the Scalable Communications Core
Porto Alegre, Brazil March 09-March 11
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2007.77IEEE Computer Society Annual Symposiu ...
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Jeff Hoffman, Intel Corporation
David Arditti Ilitzky, Intel Corporation
Anthony Chun, Intel Corporation
Aliaksei Chapyzhenka, Intel Corporation
The Scalable Communications Core (SCC) is a power- and area-efficient solution for physical layer (PHY) and lower MAC processing of concurrent multiple wireless protocols. Our architecture consists of coarse-grained, heterogeneous, programmable accelerators connected via a packet-switched 3-ary 2- cube Network on Chip (NoC). The combination of the accelerators, which were developed for key communications kernels, and the NoC results in an architecture that is flexible for multiple protocols, extensible for future standards and scalable to support multiple simultaneous streams.
Citation:
Jeff Hoffman, David Arditti Ilitzky, Anthony Chun, Aliaksei Chapyzhenka, "Overview of the Scalable Communications Core," isvlsi, pp.3-8, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007
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