SPEED CLUSTERING OF INTEGRATED CIRCUITS

Charlotte, NC, USA October 26-October 28

DOI Bookmark:

http://doi.ieeecomputersociety.org/10.1109/ITC.2004.164

International Test Conference 2004 (I ...

	This Article
	PURCHASE ARTICLE: $19 PDF HTML IEEE Xplore Subscribers
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Kenneth A. Brand Articles by Erik Volkerink Articles by Edward J. McCluskey Articles by Subhasish Mitra

	ASCII Text	x
	Kenneth A. Brand, Erik Volkerink, Edward J. McCluskey, Subhasish Mitra, "SPEED CLUSTERING OF INTEGRATED CIRCUITS," Test Conference, International, pp. 1128-1137, International Test Conference 2004 (ITC'04), 2004.

	BibTex	x
	@article{ 10.1109/ITC.2004.164, author = {Kenneth A. Brand and Erik Volkerink and Edward J. McCluskey and Subhasish Mitra}, title = {SPEED CLUSTERING OF INTEGRATED CIRCUITS}, journal ={Test Conference, International}, volume = {0}, year = {2004}, issn = {1089-3539}, pages = {1128-1137}, doi = {http://doi.ieeecomputersociety.org/10.1109/ITC.2004.164}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Test Conference, International TI - SPEED CLUSTERING OF INTEGRATED CIRCUITS SN - 1089-3539 SP1128 EP1137 A1 - Kenneth A. Brand, A1 - Erik Volkerink, A1 - Edward J. McCluskey, A1 - Subhasish Mitra, PY - 2004 KW - null VL - 0 JA - Test Conference, International ER -

Kenneth A. Brand, Stanford University, Stanford, CA, USA

Erik Volkerink, Stanford University, Stanford, CA, USA

Edward J. McCluskey, Stanford University, Stanford, CA, USA

Subhasish Mitra, Intel Corporation, Folsom, CA, USA

Experimental data on 0.18 test chips shows strong evidence of clustering of speeds of neighboring dies on a wafer. This clustering phenomenon is utilized to develop techniques for predicting the speed of a part from the speeds of three or more of its neighbors. On-chip processor monitors are used to further improve the prediction accuracy of these techniques. Experimental data demonstrates both the effectiveness of these prediction schemes and the possibility of applying of them to reduce the cost of speed binning.

Citation:

Kenneth A. Brand, Erik Volkerink, Edward J. McCluskey, Subhasish Mitra, "SPEED CLUSTERING OF INTEGRATED CIRCUITS," itc, pp.1128-1137, International Test Conference 2004 (ITC'04), 2004

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.