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SPIN-SIM: Logic and Fault Simulation for Speed-Independent Circuits
Charlotte, NC, USA October 26-October 28
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ITC.2004.165International Test Conference 2004 (I ...
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Feng Shi, Yale University New Haven, CT
Yiorgos Makris, Yale University New Haven, CT
We present SPIN-SIM, a logic and fault simulator for Speed-Independent Circuits, that extends the classical Eichelberger?s method and overcomes its limitations. In order to improve simulation accuracy, SPIN-SIM adopts a 13- valued algebra, maintains the relative order of causal signal transitions, and unfolds time frames judiciously. In addition, complex gates are handled through replacement by pseudo-gate equivalents with regards to functionality, timing and faulty behavior. Experimental results show that SPIN-SIM incurs a negligible increase in computational time over Eichelberger?s method, yet is much more accurate and achieves a significant improvement in fault coverage.
Citation:
Feng Shi, Yiorgos Makris, "SPIN-SIM: Logic and Fault Simulation for Speed-Independent Circuits," itc, pp.597-606, International Test Conference 2004 (ITC'04), 2004
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