Achieving 100 DPPM on today?s complex ASICs is a realistic but difficult proposition. More importantly, with the current state of the art testing, it remains a very costly task that often times takes many months of DPPM reduction efforts in manufacturing to achieve due to a reliance on functional or system level tests. The challenge is not whether 100 DPPM can be achieved, it can. The real challenges are being able to deliver this quality level from the first prototype lot, not impacting the design cycle time and minimizing test cost such that profit margins can still be met. The following sections describe what this author believes are the key ingredients in achieving 100 DPPM without functional testing and the advances that are needed to meet these challenges.