Recently, there have been many proposals for secure and novel cryptographic protocols that are built on bilinear pairings. The nT pairing is one such pairing and is closely related to the Tate pairing. In this paper we consider the efficient hardware implementation of this pairing in characteristic 3. All characteristic 3 operations required to compute the pairing are outlined in detail. An efficient, flexible and reconfigurable processor for the nT pairing in characteristic 3 is presented and discussed. The processor can easily be tailored for a low area implementation, for a high throughput implementation, or for a balance between the two. Results are provided for various configurations of the processor when implemented over the field F397 on an FPGA.
Citation:
Robert Ronan, Colm O?hEigeartaigh , Colin Murphy, Tim Kerins, Paulo S. L. M. Barretto, "A Reconfigurable Processor for the Cryptographic nT Pairing in Characteristic 3," itng, pp.11-16, International Conference on Information Technology (ITNG'07), 2007