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A Low-Power Fully Differential 2.4-GHz Prescaler in 0.18?m CMOS Technology
Calgary, Alberta, Canada June 30-July 02
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IWSOC.2003.1213014The 3rd IEEE International Workshop o ...
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Stephen Machan, Florida Communications Research Labs, Motorola Labs
A fully differential, 2.4-GHz 8/9 dual modulus prescaler is presented in this paper. The circuit has been constructed in a 0.18 um 1.8 V CMOS process for use in a low-power ISM transceiver. The prescaler consists of internal buffering, the divider itself, a differential to CMOS converter, and a self-contained current source. Simulations imply a maximum operating frequency of 3.05 GHz, which measurements of the silicon support. Its simulated current drain is 2.5 mA and it occupies an area of 130 ?m x 60 ?m.
Citation:
Stephen Machan, "A Low-Power Fully Differential 2.4-GHz Prescaler in 0.18?m CMOS Technology," iwsoc, pp.98, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 2003
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