ESD-Induced Internal Core Device Failure: New Failure Modes in System-on-Chip (SoC) Designs, invited

Banff, Alberta, Canada July 20-July 24

DOI Bookmark:

http://doi.ieeecomputersociety.org/10.1109/IWSOC.2005.58

Fifth International Workshop on Syste ...

	This Article
	PURCHASE ARTICLE: $19 PDF HTML IEEE Xplore Subscribers
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Yoon Huh Articles by Peter Bendix Articles by Kyungjin Min Articles by Jau-Wen Chen Articles by Ravindra Narayan Articles by Larry D. Johnson Articles by Steven H. Voldman

	ASCII Text	x
	Yoon Huh, Peter Bendix, Kyungjin Min, Jau-Wen Chen, Ravindra Narayan, Larry D. Johnson, Steven H. Voldman, "ESD-Induced Internal Core Device Failure: New Failure Modes in System-on-Chip (SoC) Designs, invited," System-on-Chip for Real-Time Applications, International Workshop on, pp. 47-53, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005.

	BibTex	x
	@article{ 10.1109/IWSOC.2005.58, author = {Yoon Huh and Peter Bendix and Kyungjin Min and Jau-Wen Chen and Ravindra Narayan and Larry D. Johnson and Steven H. Voldman}, title = {ESD-Induced Internal Core Device Failure: New Failure Modes in System-on-Chip (SoC) Designs, invited}, journal ={System-on-Chip for Real-Time Applications, International Workshop on}, volume = {0}, year = {2005}, isbn = {0-7695-2403-6}, pages = {47-53}, doi = {http://doi.ieeecomputersociety.org/10.1109/IWSOC.2005.58}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - System-on-Chip for Real-Time Applications, International Workshop on TI - ESD-Induced Internal Core Device Failure: New Failure Modes in System-on-Chip (SoC) Designs, invited SN - 0-7695-2403-6 SP47 EP53 A1 - Yoon Huh, A1 - Peter Bendix, A1 - Kyungjin Min, A1 - Jau-Wen Chen, A1 - Ravindra Narayan, A1 - Larry D. Johnson, A1 - Steven H. Voldman, PY - 2005 KW - null VL - 0 JA - System-on-Chip for Real-Time Applications, International Workshop on ER -

Yoon Huh, Global Technology Leader

Peter Bendix, Xpedion Design Systems/Global Technology Leader

Kyungjin Min, Global Technology Leader

Jau-Wen Chen, LSI Logic Corp.

Ravindra Narayan, LSI Logic Corp.

Larry D. Johnson, LSI Logic Corp.

Steven H. Voldman, IBM Microelectronics

With MOSFET scaling, increased design complexity, and multiple system power domains, ESD failures occur in internal core areas which are not connected to external package pins. A review of the various internal core device failure mechanisms and design recommendations will be presented.

Citation:

Yoon Huh, Peter Bendix, Kyungjin Min, Jau-Wen Chen, Ravindra Narayan, Larry D. Johnson, Steven H. Voldman, "ESD-Induced Internal Core Device Failure: New Failure Modes in System-on-Chip (SoC) Designs, invited," iwsoc, pp.47-53, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.