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Evolution of Bootstrap Techniques in Low-Voltage CMOS Digital VLSI Circuits for SoC Applications, invited
Banff, Alberta, Canada July 20-July 24
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IWSOC.2005.59Fifth International Workshop on Syste ...
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James B. Kuo, Simon Fraser University
This paper reports the evolution of the bootstrap techniques in low-voltage CMOS digital VLSI circuits in the past. Combining bootstrap and DTMOS Techniques, low-voltage CMOS digital VLSI circuits using a very low power supply voltage such as 0.5V have been developed for low-power SOC applications.
Citation:
James B. Kuo, "Evolution of Bootstrap Techniques in Low-Voltage CMOS Digital VLSI Circuits for SoC Applications, invited," iwsoc, pp.143-148, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005
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