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Billion-Transistor Architectures: There and Back Again
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MC.2004.1273999March 2004 (vol. 37 no. 3) pp. 22-28
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Doug Burger, The University of Texas at Austin
James R. Goodman, University of Auckland
In September 1997, Computer published a special issue on billion-transistor microprocessor architectures. Comparing that issue's predictions about the trends that would drive architectural development with the factors that subsequently emerged shows a greater-than predicted emphasis on clock speed and an unforeseen importance of power constraints. From seven architectural visions proposed in 1997, none has yet emerged as dominant. However, as we approach a microrarchitectural bound on clock speed, the primary source of improved performance must come from increased concurrency. Future billion-transistor architectures will be judged by how efficiently they support distributed hardware without placing intractable demands on programmers.
Citation:
Doug Burger, James R. Goodman, "Billion-Transistor Architectures: There and Back Again," Computer, vol. 37, no. 3, pp. 22-28, Mar. 2004, doi:10.1109/MC.2004.1273999
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