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Efficient Parametric Fault Detection in Switched-Capacitor Filters
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2006.11January/February 2006 (vol. 23 no. 1) pp. 58-66
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Antonio Petraglia, Federal University of Rio de Janeiro
Jorge M. Ca?ive, Federal University of Rio de Janeiro
Mariane R. Petraglia, Federal University of Rio de Janeiro
This DFT methodology for testing switched-capacitor filters uses a parallel connection of structurally all-pass sections. It enables multiple fault detection and accurate estimation of actually implemented parameter values, while occupying a small area and using only simple adder circuits. Requiring no reconfiguration of the circuit under test, it is suitable for online testing.
Index Terms:
allpass circuits, analog integrated circuits, circuit testing, fault diagnosis, fault location, filters, switched-capacitor filters, testing
Citation:
Antonio Petraglia, Jorge M. Ca?ive, Mariane R. Petraglia, "Efficient Parametric Fault Detection in Switched-Capacitor Filters," IEEE Design and Test of Computers, vol. 23, no. 1, pp. 58-66, Jan./Feb. 2006, doi:10.1109/MDT.2006.11
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