MP3 Optimization Exploiting Processor Architecture and using Better Algorithms

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http://doi.ieeecomputersociety.org/10.1109/MM.2005.57

May/June 2005 (vol. 25 no. 3) pp. 81-92

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	Mancia Anguita, J. Manuel Mart?nez-Lechado, "MP3 Optimization Exploiting Processor Architecture and using Better Algorithms," IEEE Micro, vol. 25, no. 3, pp. 81-92, May/June, 2005.

	BibTex	x
	@article{ 10.1109/MM.2005.57, author = {Mancia Anguita and J. Manuel Mart?nez-Lechado}, title = {MP3 Optimization Exploiting Processor Architecture and using Better Algorithms}, journal ={IEEE Micro}, volume = {25}, number = {3}, issn = {0272-1732}, year = {2005}, pages = {81-92}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2005.57}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Micro TI - MP3 Optimization Exploiting Processor Architecture and using Better Algorithms IS - 3 SN - 0272-1732 SP81 EP92 EPD - 81-92 A1 - Mancia Anguita, A1 - J. Manuel Mart?nez-Lechado, PY - 2005 KW - D.3.4.g Optimization KW - C.1 Processor Architectures KW - C.1.2.j SIMD processors KW - E.4.a Data compaction and compression KW - J.9.c Multimedia applications and multimedia signal processing VL - 25 JA - IEEE Micro ER -

Mancia Anguita, Universidad de Granada

J. Manuel Mart?nez-Lechado, Vitelcom Mobile Technology

An application's execution time depends on the processor architecture and clock frequency, the computational complexity of the algorithms, the choice of compiler and optimization options, and it also depends on how well the programmer explicitly and implicitly exploits processor architecture. This article quantifies the influence of these factors for an MP3 decoder through experimental results.

Index Terms:

D.3.4.g Optimization, C.1 Processor Architectures, C.1.2.j SIMD processors, E.4.a Data compaction and compression, J.9.c Multimedia applications and multimedia signal processing

Citation:

Mancia Anguita, J. Manuel Mart?nez-Lechado, "MP3 Optimization Exploiting Processor Architecture and using Better Algorithms," IEEE Micro, vol. 25, no. 3, pp. 81-92, May/June 2005, doi:10.1109/MM.2005.57

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