loading...
Real World SOC Experience for the Classroom
Anaheim, California, USA June 12-June 13
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MSE.2005.462005 IEEE International Conference on ...
 This Article 
 
PURCHASE ARTICLE: $0
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Johannes Grad, Illinois Institute of Technology and Cadence Design Systems
James E. Stine, Illinois Institute of Technology
David D. Neiman, Cadence Design Systems
System-on-Chip design is an important new trend in the design of complex integrated circuits. The integration of a microprocessor, memory and peripherals onto a single die opens new possibilities, but also presents new design challenges. Teaching system-on-chip design techniques to students requires not only CAD software but also design libraries and HDL code blocks. This paper presents a reference system-on-chip design as well as a set of training materials. The design is a dual-processor SOC with several peripheral blocks. It is based on a generic 180nm process design kit and cell library. All materials are available at no charge to students and universities.
Citation:
Johannes Grad, James E. Stine, David D. Neiman, "Real World SOC Experience for the Classroom," mse, pp.49-50, 2005 IEEE International Conference on Microelectronic Systems Education (MSE'05), 2005
Usage of this product signifies your acceptance of the Terms of Use.