This paper presents the result from a project course, focusing on all levels in the ASIC design flow by implementing a complete MP3 decoder. Two student teams developed a decoder targeting ASIC and FPGA, respectively. The ASIC decoder, fabricated in a 0.35 µm process from AMI semiconductor, consumes 40mW with a supply voltage ov 2V running at 12 MHz. The FPGA decoder has been implemented and verified on a Virtex-II platform.
Citation:
Hugo Hedberg, Thomas Lenart, Henrik Svensson, "A Complete MP3 Decoder on a Chip," mse, pp.103-104, 2005 IEEE International Conference on Microelectronic Systems Education (MSE'05), 2005