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Micro Programmable Built-In Self Repair for SRAMs
San Jose, California, USA August 09-August 10
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MTDT.2004.14Records of the 2004 International Wor ...
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R. Zappa, C. Selva, D. Rimondi, C. Torelli, M. Crestan, G. Mastrodomenico, L. Albani, "Micro Programmable Built-In Self Repair for SRAMs," Memory Technology, Design and Testin, IEEE International Workshop on, pp. 72-77, Records of the 2004 International Workshop on Memory Technology, Design and Testing (MTDT'04), 2004.
 
 
BibTex
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@article{ 10.1109/MTDT.2004.14,
author = {R. Zappa and C. Selva and D. Rimondi and C. Torelli and M. Crestan and G. Mastrodomenico and L. Albani},
title = {Micro Programmable Built-In Self Repair for SRAMs},
journal ={Memory Technology, Design and Testin, IEEE International Workshop on},
volume = {0},
year = {2004},
issn = {1087-4852},
pages = {72-77},
doi = {http://doi.ieeecomputersociety.org/10.1109/MTDT.2004.14},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Memory Technology, Design and Testin, IEEE International Workshop on
TI - Micro Programmable Built-In Self Repair for SRAMs
SN - 1087-4852
SP72
EP77
A1 - R. Zappa,
A1 - C. Selva,
A1 - D. Rimondi,
A1 - C. Torelli,
A1 - M. Crestan,
A1 - G. Mastrodomenico,
A1 - L. Albani,
PY - 2004
KW - null
VL - 0
JA - Memory Technology, Design and Testin, IEEE International Workshop on
ER -
 
R. Zappa, STMicroelectronics
C. Selva, STMicroelectronics
D. Rimondi, STMicroelectronics
C. Torelli, STMicroelectronics
M. Crestan, STMicroelectronics
G. Mastrodomenico, STMicroelectronics
L. Albani, STMicroelectronics

A Built-In Self Repair (BISR) machine is herewith proposed, able to test at speed and repair embedded Static Random Access Memories. Unlike the common approach to blow laser-fuse registers, here the repair operation is completely accomplished by the BISR machine, with no external intervene. The information related to the repair operation is stored into an on-chip FLASH memory.

The machine is user programmable, since it can test memories of different capacity, architecture and aspect ratio, with up to four test algorithms and two test flows. An "industrial" test flow is intended for production; while, in case of failure, a more complex "screening flow" allows to distinguish whether the unsuccessful repair operation is due to exceeded redundancy capacity or to faulty FLASH programming.

This system is aimed to enhance test diagnostic capability and to improve production yield of devices which it is connected to, by-passing the actual losses in time and resources of currently used laser-fuse approach.

Citation:
R. Zappa, C. Selva, D. Rimondi, C. Torelli, M. Crestan, G. Mastrodomenico, L. Albani, "Micro Programmable Built-In Self Repair for SRAMs," mtdt, pp.72-77, Records of the 2004 International Workshop on Memory Technology, Design and Testing (MTDT'04), 2004
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