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On Correlating Structural Tests with Functional Tests for Speed Binning of High Performance Design
Austin, Texas September 09-September 10
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MTV.2004.17Fifth International Workshop on Micro ...
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J. Zeng, Freescale Semiconductor Inc.
M. S. Abadir, Freescale Semiconductor Inc.
G. Vandling, Cadence Design Systems
L.-C. Wang, University of California at Santa Barbara
S. Karako, Freescale Semiconductor Inc.
J. A. Abraham, University of Texas at Austin
The use of functional vectors has been an industry standard for speed binning of high-performance ICs. This practice can be prohibitively expensive as ICs become faster and more complex. In comparison, structural patterns target performance related faults in a more systematic manner. To make structural testing an effective alternative for speed binning, this paper investigates the correlation between functional test frequency and the test frequencies of various types of structural patterns on MPC7455, a Motorola microprocessor compatible to PowerPC™ ¹ instruction set architecture
Citation:
J. Zeng, M. S. Abadir, G. Vandling, L.-C. Wang, S. Karako, J. A. Abraham, "On Correlating Structural Tests with Functional Tests for Speed Binning of High Performance Design," mtv, pp.103-109, Fifth International Workshop on Microprocessor Test and Verification (MTV'04), 2004
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