David Berner, Institut de Recherche en Informatique et Systemes Aleatoires (IRISA/INRIA), France
The increasing complexity and size of system level design models introduces a difficult challenge for validating them. Hence, in most industries, design validation takes a large percentage of the overall design time. In efforts to alleviate this problem, we propose a methodology of using structural reflection to extract structural information from design sources allowing the use of tools such as testbench generators and model viewers to seamlessly employ this extracted information. In this paper we present a methodology to automatically extract structural information from already existing SystemC projects and we show how this information can be exploited for system management and validation tasks. We illustrate example uses such as visualization, design management tasks, and automated test generation.
Citation:
David Berner, Hiren D. Patel, Deepak A. Mathaikutty, Sandeep K. Shukla, "Automated Extraction of Structural Information from SystemC-based IP for Validation," mtv, pp.99-104, Sixth International Workshop on Microprocessor Test and Verification (MTV'05), 2005