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RSTM : A Relaxed Consistency Software Transactional Memory for Multicores
Brasov, Romania September 15-September 19
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PACT.2007.6216th International Conference on Para ...
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Jaswanth Sreeram, Romain Cledat, Tushar Kumar, Santosh Pande, "RSTM : A Relaxed Consistency Software Transactional Memory for Multicores," Parallel Architectures and Compilation Techniques, International Conference on, pp. 428, 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007), 2007.
 
 
BibTex
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@article{ 10.1109/PACT.2007.62,
author = {Jaswanth Sreeram and Romain Cledat and Tushar Kumar and Santosh Pande},
title = {RSTM : A Relaxed Consistency Software Transactional Memory for Multicores},
journal ={Parallel Architectures and Compilation Techniques, International Conference on},
volume = {0},
year = {2007},
issn = {1089-795X},
pages = {428},
doi = {http://doi.ieeecomputersociety.org/10.1109/PACT.2007.62},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Parallel Architectures and Compilation Techniques, International Conference on
TI - RSTM : A Relaxed Consistency Software Transactional Memory for Multicores
SN - 1089-795X
SP
EP
A1 - Jaswanth Sreeram,
A1 - Romain Cledat,
A1 - Tushar Kumar,
A1 - Santosh Pande,
PY - 2007
KW - null
VL - 0
JA - Parallel Architectures and Compilation Techniques, International Conference on
ER -
 
Jaswanth Sreeram, Georgia Institute of Technology, USA
Romain Cledat, Georgia Institute of Technology, USA
Tushar Kumar, Georgia Institute of Technology, USA
Santosh Pande, Georgia Institute of Technology, USA
Software Transactional Memory (STM) Systems have been proposed in order to make parallel programs easier to develop and verify compared to conventional lock-based programming techniques. However, conventional STMs do not scale in performance to a large number of concurrent threads for several classes of applications. While the atomicity semantics of traditional STMs greatly simplify the correct sharing of data between threads, these same atomicity semantics incur a large penalty in program execution time.
Citation:
Jaswanth Sreeram, Romain Cledat, Tushar Kumar, Santosh Pande, "RSTM : A Relaxed Consistency Software Transactional Memory for Multicores," pact, pp.428, 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007), 2007
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