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Portable Execution Time Analysis Method
Sydney, Australia August 16-August 18
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/RTCSA.2006.4912th IEEE International Conference on ...
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Keiji Yamamoto, The University of Tokyo, Japan
Yutaka Ishikawa, The University of Tokyo, Japan
Toshihiro Matsui, National Institute of Advanced Industrial Science and Technology, Japan
We propose a new execution time prediction method that combines measurement-based execution time analysis and simulation-based memory access analysis. In measurement-based execution time analysis, the target program is divided into basic blocks, to each of which a memory area accessed by the block is allocated, so that all the basic block execution times are measured on a real machine. Since the execution behavior of such a basic block is not a real case, simulation-based memory access analysis is introduced to calculate the memory access cost. The method has been implemented using the intermediate expressions (both TREE and RTL expressions) used in GCC (Gnu Compiler Collection). This paper demonstrates that the proposed method predicts the execution time safely in different architecture environments, i.e. Pentium-M and XScale.
Citation:
Keiji Yamamoto, Yutaka Ishikawa, Toshihiro Matsui, "Portable Execution Time Analysis Method," rtcsa, pp.267-270, 12th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'06), 2006
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